ECE 152 

Computer Architecture

Spring 2012
Professor Daniel J. Sorin


The objective of this course is to learn how computers work, focusing on how the computer hardware executes the software. 
The course focuses on instruction sets, computer arithmetic, processor design, memory system design, and input/output.  A major component
of the course will be a group project in which each team of students will design and build a computer in real hardware and then run programs on it.
Prerequisites: ECE 52 and the ability to program in a high-level language (C, C++, or Java)
Class Location and Hours


Class meets Monday/Wednesday/Friday from 10:20am - 11:10am.

Location: Hudson 125

 Instructor, Teaching Assistant, and News Group


This is a large class, which means that students should contact other sources of information before, if necessary, contacting the professor.


* The first option for finding help is this website.

* The second option for finding help is the outstanding group of teaching assistants for this course.  Either email them (via the course's Google group) or go to their office hours. Questions on the Google group may get answered by a TA, a fellow classmate, or the professor.

Graduate Teaching Assistant: Ralph Nathan (, Thurs 10-11

Undergraduate Teaching Assistants:

John Cuffney (john.cuffney@), Weds 11-12

David Herzka (david.herzka@), Weds 2:30-3:30

Justin Klaassen (justin.klaassen@), Tues 3-4

Guy Tracy (guy.tracy@), Fri 1-2

Xin Xu (xin.xu@), Fri 3-4

Jonathan Zhang (yz96@), Monday 1:30-2:30


* If you need to contact the professor, please email him or come to his office hours:

Professor Daniel J. Sorin

Office: 209C Hudson Hall

Office Hours: Monday 11:10-noon, Thurs 1:30-2:30

Email: sorin AT ee DOT duke DOT edu (email subject must begin with ECE152)

Required Textbook
David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 4th edition, Morgan-Kaufmann.
 Assignments and Grading
This course will require readings from the textbook, pencil and paper problems, programming assignments, and one multi-part project.

Students are responsible for:

Deadlines will be enforced except under extreme circumstances. Anything turned in late will incur a 10% penalty per day late (e.g., from due date until 24 hours late is 10% off). I would prefer that you turn in something not quite done on the due date rather than waiting until after the deadline to try to finish it. 

Start assignments and projects EARLY so that you don't get stuck at the end!

Academic Misconduct: I will not tolerate academically dishonest work.  This includes cheating on the homework, project, and exams.  
This course has historically had a high incidence of academic misconduct cases which have led to academic suspension and expulsion. 
Refer to the Duke Undergraduate Honor Code or to the instructor if you have any questions about misconduct.
 Topics, Lecture Notes, and Reading Assignments

I will post lecture notes (in PDF format) shortly before I cover them in class.  Please bring them to class. Click on topic title for link to notes.

Do not think that you can read the notes instead of attending class.  You will miss a LOT of course material if you miss class.

Topic Reading Assignments
Course Introduction and Overview

Chapter 1
Instruction Sets and Assembly Programming
   slides, part 1
   slides, part 2
   slides, part 3
   slides, part 4
   slides, part 5
Chapter 2
Computer Arithmetic and ALU Design
   slides, part 1
   slides, part 2
   slides, part 3
   slides, part 4
Chapter 3
Processor Design: Datapath and Control
   slides, part 1
   slides, part 2
Chapter 4: 4.1-4.4
Pipelined Processors
   slides, part 1
   slides, part 2
   slides, part 3
Chapter 4: 4.5-end
Memory and Caches
   slides, part 1
   slides, part 2
   slides, part 3
   slides, part 4
Chapter 5
   slides, part 1
   slides, part 2
Chapter 6
Multicore Processors
   slides, part 1
   slides, part 2
Chapter 7
Performance and Advanced Topics
Homework Assignments

Homework #1 (Intro and Chapter 1), due Monday, Jan 23

Homework #2 (Instruction Sets and Chapter 2), due Monday, Feb 6

Homework #3 (Arithmetic and Chapter 3), due Monday, Feb 20

Homework #4 (Unpipelined CPU and Chapter 4), due Wednesday, Mar 14

Homework #5 (Pipelined CPU) -- CANCELLED

Homework #6 (Caches/Memory and Chapter 5), due Wednesday, Apr 18


The project for this class will be performed in groups of 2, and it has multiple parts. The end products will be:

The Duke 152/S11 architecture's specification

I have subdivided this project into smaller parts that will be due throughout the semester.

Part 1: Register File (75 points), due Friday, Jan 20

Part 2: Memory (25 points), due Friday, Jan 27

Part 3: Adder/Shifter (100 points), due Weds, Feb 8

Part 4: ALU (75 points), due Weds, Feb 22

Part 5: Unpipelined processor (200 points), due Fri, Mar 16

Part 6: Pipelined processor (200 points), due Weds, Apr 11

Part 7: Whole Enchilada (200 points), due Weds, Apr 25


This is a VERY tentative schedule which may change depending on time constraints and which days the instructor will be out of town.






Jan 9




Jan 16


Intro Intro
Jan 23 Instruction Sets Instruction Sets Instruction Sets
Jan 30 Instruction Sets Computer Arithmetic

Computer Arithmetic

Feb 6 Computer Arithmetic Computer Arithmetic

Computer Arithmetic

Feb 13 Processor Design

Processor Design

Processor Design  

Feb 20 Pipelining review for midterm NO CLASS
Feb 27


Pipelining Pipelining
Mar 5


Mar 12 Pipelining Memory Systems Memory Systems
Mar 19 Memory Systems Memory Systems Memory Systems
Mar 26 Memory Systems


Apr 2 I/O Multicore Multicore
Apr 9 Multicore Multicore Multicore/Sun Niagara
Apr 16 Sun Niagara Advanced Topics Advanced Topics
Apr 23

review for final exam

project demos

Reading Period

Apr 30

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