ECE 250 / CS 250

Computer Architecture

Fall 2024

Professor Daniel J. Sorin

                  

 Objectives

 

The objective of this course is to learn how computers work, focusing on how the computer hardware executes the software. 

The course focuses on: instruction sets, assembly language programming, basic digital logic design, processor design, memory system design, and input/output.  

Prerequisites: CompSci 201 

 

Class Location and Hours

 

Class meets Monday/Wednesday/Friday from 10:20-11:10am in TBD

Recitations are on Thursdays.

 Instructor, Teaching Assistants, and Answering Questions

 

This is a very large class, which means that students should contact other sources of information before, if necessary, contacting the professor.

* The first option for finding help is this website.

* Then check the course's Canvas announcements and Ed Discussion.

* The third option for finding help is the outstanding group of teaching assistants for this course.  Either email them or go to their office hours. Questions on the Ed Discussion forum may get answered by a TA, a fellow classmate, or the professor.

* Please contact the professor only for those issues that cannot be handled by anyone else.

Graduate Teaching Assistants: 

Feng Cheng

Qianyi Xue

 

* If you need to contact the professor, please email him or come to his office hours:

Professor Daniel J. Sorin

Office: 403 Wilkinson

Office Hours: TBD

Email: sorin AT ee DOT duke DOT edu 

Very Highly Recommended Textbook

 

David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 5th edition, Morgan-Kaufmann.

Please do not get the "ARM" edition or "RISC-V" edition or the "Revised Printing" -- for some reason, the publisher has created several flavors of this book.

 

The nice people at Duke Libraries have copies of this book available.

 

 Assignments and Grading

 

This course will require readings from the textbook, pencil and paper problems, programming assignments, and digital logic designs.

Students are responsible for:

Late homework policy -- NO exceptions, NO extensions (except in case of dean's excuse). Refer to Homework #1 for details, particularly
with respect to the new protocol for handling short-term incapacitation with automatic 48-hour extensions on Homeworks 3-7.

    0-24 hours late: Take earned score and multiply by 0.9
    24-48 hours late: Take earned score and multiply by 0.8
    >48 hours late: NO CREDIT

Late penalty will be applied to the entire assignment.  That is, if you turn in half of the assignment on time and half late, we assign the late penalty to all.

You must attend all exams (except in case of dean's excuse or sickness with STINF).  There are no makeup exams except in these situations.

Start assignments EARLY so that you don't get stuck at the end!

Academic Misconduct: I will not tolerate academically dishonest work.  This includes cheating on the homework and exams.  

I will refer all suspected cases of cheating to Duke's Office of Student Conduct.

Refer to Homework #1, the Duke Community Standard, and the instructor if you have any questions about misconduct.

 

 Topics, Lecture Notes, and Reading Assignments

 

I will post lecture notes (in PDF format on Sakai) shortly before I cover them in class.  Please bring them to class. 

If you read the notes instead of attending class, you will miss a LOT of course material if you miss class.

Topic

Reading Assignments

Course Introduction and Overview
 

Chapter 1

Instruction Sets and Assembly Programming
 

Chapter 2

Digital Logic Design
 

Appendix B

Processor Core Design: Datapath and Control
   

Chapter 4: 4.1-4.4

Memory and Caches
  

Chapter 5

I/O
  

somewhat covered in Appendix A.8 

Pipelined Processor Cores
   

Chapter 4: 4.5-end

Multicore Processors (time permitting)
   

Chapter 6

 

 

 

 

 Schedule

This is a VERY tentative schedule that may change.

Week

Mon

Weds

THURS-RECITATION

Fri

Aug 26

intro/overview

C prog

Using unix machine

C prog // HW1 (RULES) DUE

Sep 2

LABOR DAY

C prog // HW2 (UNIX) DUE

intro to writing C prog

C prog

Sep 9

C prog

from C to binary

C prog: pointers and mem

from C to binary

Sep 16

from C to binary

assembly

asm prog: examples/SPIM

assembly // HW 3 (C) DUE

Sep 23

assembly

assembly

asm prog: calling conventions

combo logic

Sep 30

combo logic

seq logic

review for midterm #1

MIDTERM #1

Oct 7

seq logic

seq logic

digital design & logisim

datapath design // HW4 (ASM) DUE

Oct 14

datapath design

exceptions/syscalls

logisim for large projects

mem hierarchies

Oct 21

caches // HW5 (LOGIC) DUE

caches

advanced logisim

caches

Oct 28

vmem

vmem

review for midterm #2

MIDTERM #2

Nov 4

vmem

i/o

cache/vmem examples

i/o

Nov 11

io // HW6 (CPU) DUE

pipelines

cache/vmem examples

pipelines

Nov 18

pipelines

pipelines

pipeline examples

multicore

Nov 25

multicore

THANKSGIVING BREAK

Dec 2

optional: advanced comp arch

Niagara // HW7 (CACHESIM) DUE

review for final

review for final

Dec 9

READING PERIOD

FINALS WEEK

Dec 16

FINALS WEEK ENDS