ECE 261: CMOS VLSI Design Methodologies, Fall 2009

Instructor: Prof. James Morizio
Office: 213c Hudson Hall
Ph: 201-7759
Office Hours: Tues, Thurs: 1:00-2:00 or by appointment

Class hours and classroom: Tues, Thurs 11:40-12:55, Room: 115 Hudson Hall

Course TAs:

Lab Consultant and CAD tools Administrator: Brandon Noia and Bogdan Romanescu
Lab hours: Tuesday 1-2 PM (in Room 115 Hudson Hall)

Textbook: M. Weste and D. Harris, CMOS VLSI Design (A Circuits and Systems Perspective)", 3rd edition, Addison-Wesley, 2005.

Prerequisites: Switching Theory and Logic Design (ECE 151), Basic Electronics (ECE 163). Students are expected to know logic design, and elementary circuits and device physics from sophomore and junior-level courses. Some background in computer organization is helpful but not required.

Please refer to this PDF file for information about lecture schedule

Course Objectives: To introduce students to CMOS VLSI design methodologies with emphasis on full-custom chip design. Students will make extensive use of CAD tools for IC design, simulation, and layout verification. Specific techniques for designing high-speed, low-power, and easily-testable circuits will also be covered.

Term Project: This is a project-oriented course in which groups of four students will design and simulate a simple custom IC. The project will be carried out using Mentor Graphics CAD tools. Four lead-in lab assignments will allow the students to gain familiarity with the tools as they proceed with the project. There will be several checkpoints during the semester to verify the progress made in the project. Meeting and passing these checkpoints is crucial in order to successfully complete the chip design. A written project report and a formal project presentation will also be required.

Here is the list of projects from Fall 2009 and Fall 2008 and Fall 2007 and Fall 2006

Members of a team will usually receive the same grade for their project design. Credit will be given for soundness of engineering design (appropriate design trade-offs) and ingenuity at all levels of design activity. (Note that ingenuity is often seen in simplicity, rather than added complexity). Documentation is equally important. The final report should include an application-based specification, and a clear description of the resulting chip implementation. Writing style, figure quality and spelling will count. Finally, producability is important-this involves completion of the project so that it is ready to submit for fabrication, simulation and verification at a level which will assure working parts, and testability of the chip.

Homeworks and Exams: There will four evenly-spaced homeworks in the form of problem sets. These will be based on the lecture material. Three in-class exams, scheduled for September 22, October 20, and November 17, will test basic understanding of the concepts presented in class.

Grading Policy: Four homeworks-10%, Exams-40%, Four labs-20%, Project-30%.

The labs will be simple design exercises aimed at building familiarity and expertise with the Mentor Graphics tools. Note that there will be a penalty of 10% per day on late homework and lab submissions. Late homework and lab submissions will not be accepted after three days.

For the purposes of establishing standards for submitted graded work, each student should include the following signed statement in each piece of work submitted:
"I have adhered to the Duke Community Standard in completing this assignment."

The course policy for making up a graded exercise missed due to a short-term illness will be consistent with the university policy. This policy was adopted by the faculty councils of Arts and Sciences and Pratt School of Engineering early in the fall semester, 2003. Until that time, if you are unable to complete academic work (tests, exams, papers or scheduled graded assignments) as a result of short-term illness, you should speak directly with your instructor, ideally before your absence.

For more information on unix, emacs and vi editor commands please refer to the following:
Commonly used commands for Unix, emacs and vi (Prepared by Yaoyu Yang)

For instructions on how to run the Mentor Graphics tools (da, ic, Model sim, Eldo, Calibre),
please refer to the following tutorial

Introduction to Mentor Graphics Design Tools

Updated by Matt Roberts in 2009, Erkan Acar and Erden Erdogan, Roman Schwarz for Linux OS 2006
Original authored by Mahmut Yilmaz for Solaris in 2005

CAD wiki (Prepared by Erkan Acar)

Design Rules (Prepared by Mahmut Yilamz)

Inverter Design: Schematics (pdf file) (Prepared by Matt Roberts)

Inverter Design: Layout (pdf file) (Prepared by Matt Roberts)

Important Announcements

Project Announcement

Lab Assignments


Here are the copies of slides used in class (PDF format):

Introduction (Lecture notes for 08/25/09)

CMOS Circuits (Lecture notes for 08/27/09)

MOS Theory (Lecture notes for 09/01/09 )

Fabrication (Lecture notes for 9/03/09)

Circuit Characterization (Lecture notes for 09/8/09, 9/15/09 and 9/17/09)

Interconnects (Lecture notes for 09/24/09)

StaticMos (Lecture notes for 9/29/09 and 10/01/09)

Project Proposal Presentations on 10/01/09

Dynamic CMOS (Lecture notes for 10/08/09 and 10/13/09)

Sequential Circuits Part 1 (Lecture notes for 10/15/09)

Sequential Circuits Part 2 (Lecture notes for 10/22/09)

Design Methods and Tools (Lecture notes for 10/27/09)

Circuit Pitfalls (Lecture notes for 10/29/09)

Project Proposal Presentations II on 11/03/09

Testing Part 1(Lecture notes for 11/10/09)

Testing Part 2(Lecture notes for 11/10/09)

Arithmetic Cicuits I (Lecture notes for 11/5/09 )

Arithmetic Cicuits II (Lecture notes for 11/12/09)

Memory Design (Lecture notes for 11/12/09)

Advanced Topics (Lecture notes for 11/12/09)

Final Project Presentations on 11/19/09

Project Grading and demonstrations during Exam period

STUDENT FORUM for email questions last updated 10/27/2006
James Morizio
Last updated: 8/9/2009