| ECE 152 |
|
Computer Architecture |
| Spring 2009 |
| Professor Daniel J. Sorin |
| Objectives |
| The objective of this course is to learn how computers work, focusing on how the computer hardware executes the software. |
| The course focuses on instruction sets, computer arithmetic, processor design, memory system design, and input/output. A major component |
| of the course will be a group project in which each team of students will design and build a computer in real hardware and then run programs on it. |
| Prerequisites: ECE 52 (or ECE 151) and the ability to program in a high-level language (C, C++, or Java) |
| Class Location and Hours |
Class meets Monday/Wednesday/Friday from 10:20am - 11:10am.
Location: 207 Hudson Hall
| Instructor, Teaching Assistant, and News Group |
This is a large class, which means that students should contact other sources of information before, if necessary, contacting the professor.
* The first option for finding help is this website.
* The second option for finding help is the outstanding group of teaching assistants for this course. Either email them (via the course's Google group) or go to their office hours. Questions on the Google group may get answered by a TA, a fellow classmate, or the professor.
Undergraduate Teaching Assistants:
Laura Angle (laura.angle AT duke DOT edu)
no office hours
Kevin Brown (kjb5 AT duke DOT edu)
Monday 4:15-5:15 at Hudson 202A
Alex Edelsburg (alex DOT edelsburg AT duke DOT edu)
Alex Hunter (alex DOT hunter AT duke DOT edu)
Thursday 1:00-2:00 at Hudson 202A
George Rossin (george DOT rossin AT duke DOT edu)
Friday 1:30-2:30 at Hudson 202A
Preeyanka Shah (preeyanka DOT shah AT duke DOT edu)
* If you need to contact the professor, please email him or come to his office hours:
Office: 209C Hudson Hall
Office Hours: Weds 11:10-noon, Thurs 2:30-3:30
Email: sorin AT ee DOT duke DOT edu (email subject must begin with ECE152)
| Required Textbook |
| David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 4th edition, Morgan-Kaufmann. |
| Assignments and Grading |
| This course will require readings from the textbook, pencil and paper problems, programming assignments, and one multi-part project. |
Students are responsible for:
| Deadlines will be enforced except under extreme
circumstances. Anything turned in late will incur a 10% penalty
per day late (e.g., from due date until 24 hours late is 10%
off). I would prefer that you turn in something not quite done on the due date
rather than waiting until after the deadline to try to finish
it.
Start assignments and projects EARLY so that you don't get stuck at the end! |
| Academic Misconduct: I will not tolerate academically dishonest work. This includes cheating on the homework, project, and exams. |
| This course has historically had a high incidence of academic misconduct cases which have led to academic suspension and expulsion. |
| Refer to the Duke Undergraduate Honor Code or to the instructor if you have any questions about misconduct. |
| Topics, Lecture Notes, and Reading Assignments |
|
I will post lecture notes (in PDF format) shortly before I cover them in class. Please bring them to class. Click on topic title for link to notes. Do not think that you can read the notes instead of attending class. You will miss a LOT of course material if you miss class.
|
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| Homework Assignments |
Homework #1 (Introduction / Chapter 1), due Weds, Jan 21 in class
Homework #2 (ISAs / Chapter 2), due Mon, Feb 2 in class (assembly code due at 10:00am)
Homework #3 (Arithmetic / Chapter 3), due Fri, Feb 20 in class
Homework #4 (Unpipelined CPU Design / Chapter 4), due Fri, Mar 6 in class
Homework #5 (Pipelined CPU Design / Chapter 4), due Weds, Mar 25 in class
Homework #6 (Caches and Memory / Chapter 5), due Mon, Apr 13 in class
| Project |
The project for this class will be performed in groups of 2, and it has multiple parts. The end products will be:
The Duke 152/16 architecture's specification
I have subdivided this project into smaller parts that will be due throughout the semester.
Part 1: Register File and Finite State Machine (75 points), due Friday, January 16
Part 2: High performance adder (100 points), due Friday, February 6
Part 3: ALU (75 points), due Monday, February 16
Part 4: Memory (25 points), due Monday, February 23
Part 5: Unpipelined CPU (200 points), due Friday, March 20
Part 6: Pipelined CPU (200 points), due Friday, April 3
Part 7: Whole Enchilada (200 points), due Wednesday, April 22
| Schedule |
This is a VERY tentative schedule which may change depending on time constraints and which days the instructor will be out of town.
|
Week |
Monday |
Wednesday |
Friday |
Jan 5 |
|
Intro/Overview |
Intro |
| Jan 12 |
Intro |
Instruction Sets | Instruction Sets |
| Jan 19 |
MLK DAY |
Instruction Sets | Instruction Sets |
| Jan 26 | Instruction Sets | Computer Arithmetic |
Computer Arithmetic |
| Feb 2 | Computer Arithmetic | Computer Arithmetic |
Computer Arithmetic |
| Feb 9 | Processor Design | Processor Design |
NO CLASS - Prof Sorin out of town |
|
Feb 16 |
Pipelining | Pipelining | Pipelining |
| Feb 23 | Pipelining | Pipelining | review for Midterm |
| Mar 2 |
Midterm |
Memory Systems | Memory Systems |
| Mar 9 |
SPRING BREAK |
||
| Mar 16 | Memory Systems | Memory Systems | Memory Systems |
| Mar 23 | Memory Systems | NO CLASS - Prof Sorin out of town | NO CLASS - Prof Sorin out of town |
| Mar 30 | I/O |
I/O |
I/O |
| Apr 6 | Multicore | Multicore | Multicore |
| Apr 13 | Multicore | Multicore/Sun Niagara | Sun Niagara |
| Apr 20 |
review for final exam |
project demos |
Reading Period |
| Apr 27 |
-------- EXAM WEEK -------- |
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