ECE 250 / CS 250

Computer Architecture

Spring 2013
Professor Daniel J. Sorin


The objective of this course is to learn how computers work, focusing on how the computer hardware executes the software. 
The course focuses on: instruction sets, assembly language programming, basic digital logic design, processor design, memory system design, and input/output.  
Prerequisites: Everyone must have CS 201 (used to be CS 100).   ECE majors must also have ECE 110 (used to be ECE 27). 
Class Location and Hours


Class meets Monday/Wednesday/Friday from 10:20am - 11:10am at Teer 203.

Recitations are on Tues and Weds afternoons.

 Instructor, Teaching Assistant, and News Group


This is a very large class, which means that students should contact other sources of information before, if necessary, contacting the professor.

* The first option for finding help is this website.

* The second option for finding help is the outstanding group of teaching assistants for this course.  Either email them (via the Piazza forum) or go to their office hours. Questions on the Piazza forum may get answered by a TA, a fellow classmate, or the professor.

Graduate Teaching Assistants:  

Blake Hechtman (, Tues 4:20-5:20 @ 203 Teer

Seyed Majid Zahedi (, Weds 6:00-7:00pm @ LSRC D344


Undergraduate Teaching Assistants:

Xavier de Gunten: Monday noon-1 @ LINK (Perkins)

Helio Liu: Friday noon-1 @ LINK-like room in front of Hudson Hall (where e-print is)

Ari Novick

David Spruill: Tuesday 1:30-2:30 @ LINK (Perkins)

Jennifer Villa

Wayne You


* If you need to contact the professor, please email him or come to his office hours:

Professor Daniel J. Sorin

Office: 209C Hudson Hall

Office Hours: Monday 2:30-3:30, Thursday 2:00-3:00 --- email me if you have class at both of these times and wish to meet with me

Email: sorin AT ee DOT duke DOT edu 

Required Textbook
David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, 4th edition, Morgan-Kaufmann.
Please do not get the "ARM" edition or the "Revised Printing" -- for some reason, the publisher has created several flavors of this book.
 Assignments and Grading
This course will require readings from the textbook, pencil and paper problems, programming assignments, and digital logic designs.

Students are responsible for:

Late homework policy -- NO exceptions, NO extensions (except in case of dean's excuse)

    0-24 hours late: 10% penalty
    24-48 hours late: 20% penalty
    >48 hours late: NO CREDIT

Start assignments and projects EARLY so that you don't get stuck at the end!

Academic Misconduct: I will not tolerate academically dishonest work.  This includes cheating on the homework and exams.  
I will refer all suspected cases of cheating to the Duke Undergraduate Judicial Board.
Refer to the Duke Undergraduate Honor Code or to the instructor if you have any questions about misconduct.
 Topics, Lecture Notes, and Reading Assignments

I will post lecture notes (in PDF format) shortly before I cover them in class.  Please bring them to class. Click on topic title for link to notes.

Do not think that you can read the notes instead of attending class.  You will miss a LOT of course material if you miss class.

Topic Reading Assignments
Course Introduction and Overview
Chapter 1
Instruction Sets and Assembly Programming
Chapter 2
Digital Logic Design
Appendix C
Processor Core Design: Datapath and Control
Chapter 4: 4.1-4.4
Memory and Caches
Chapter 5
Chapter 6
Pipelined Processor Cores (time permitting)
Chapter 4: 4.5-end
Multicore Processors
Chapter 7
Homework Assignments

Homework #1 (From C to binary), due TBD

Homework #2 (Assembly programming)

Homework #3 (Digital logic design)

Homework #4 (Processor core design)

Homework #5 (Memory systems)

Homework #6 (I/O)

Homework #7 (Pipelining & Multicore)


This is a VERY tentative schedule which may change depending on time constraints and which days the instructor will be out of town.






Jan 7


no recitation first week


From C to binary
Jan 14

From C to binary

C programming: memory management, debugging with gdb From C to binary Assembly language
Jan 21 MLK Day Assembly programming examples / Using SPIM Assembly Assembly
Jan 28 Assembly  Assembly programming examples: focus on calling conventions Intro to digital logic design Combinational logic
Feb 4 Sequential logic

Digital design examples / Using Logisim

Sequential logic

Functional Units

Feb 11 Datapath design review for Midterm #1 Datapath design Midterm #1 (does not include digital logic design)
Feb 18 Datapath design Using Logisim for larger projects Exceptions/interrupts/syscalls Memory hierarchies
Feb 25

Memory hierarchies

TBD Caches Caches
Mar 4 Caches Cache operation examples Caches Virtual Memory
Mar 11


Mar 18 Virtual Memory review for Midterm #2 Virtual Memory Midterm #2 (does not include memory systems)
Mar 25 I/O Virtual memory operation examples I/O I/O
Apr 1 Pipelined cores Cache+virtual memory examples

Pipelined cores

Pipelined cores
Apr 8 Pipelined cores Pipelined operation examples Pipelined cores Multiprocessors
Apr 15


TBD Multicore Sun's Niagara multicore processor
Apr 22 In-class study of modern processors review for final exam review for final exam  
Apr 29