HSPICE

Go to mgc/ directory.
At UNIX prompt, type: cd; cd mgc
Remove mgc_location_map file.
rm mgc_location_map
Edit mgc_location_map.custom
pico (or vi) mgc_location_map.custom.
Follow my format (replace rmw with your userid):
MGC_LOCATION_MAP_1


##########################
# Your personal libraries
##########################
$MYNETS
/homes/rmw/mentor/nets

$MYLAY
/homes/rmw/mentor/layout

$RMWNETS
/homes/rmw/mentor/nets

$RMWLAY
/homes/rmw/mentor/layout
Type ls at the prompt. You should not see a mgc_location_map file.
Set up mentor again
At UNIX prompt, type source /opt/digital/setup_mentor.
Type ls at the prompt. You should see a mgc_location_map file now. If you don't, exit the xterm window and open a new one.
Make an hspice directory.
At UNIX prompt, type mkdir ~/hspice.
Enter hspice directory.
At UNIX prompt, type cd ~/hspice.
Create a netlist of your schematic.
At UNIX prompt, type netlist ~/mentor/nets/hw2
Modify (pico/vi) the file spice_out:
The first line must be blank. This is ESSENTIAL!
You should see three .SUBCKT sections: one for your inverter, one for your transmission gate, and one for your flip flop. The third may be .SUBCKT flipflop.
The second line after your flip flop is declared (after the .SUBCKT line), you should see the line: + DUMMY_PIN. Erase DUMMY_PIN and put in a list of your flip flop's nodes: + D Q Q_BAR CLOCK.
After the end of your flip flop subcircuit (after .ENDS * flipflop *), insert a new line. You need to tell hspice that flipflop is actually your top level circuit and what it's ins and outs are, so use a line like this: XTOPCELL D Q Q_BAR CLOCK flipflop. 
Next you need some voltage sources, one to D and one to the CLOCK. I made both of mine pulses using this syntax: Vxxxxx N+ N- pulse (V_lo V_hi t_d t_r t_f pulse_width, period). Here's an example: V_CLOCK CLOCK gnd pulse (0 5 0ns 0ns 0ns 20ns 40ns). This gives me a voltage source between ground and the node CLOCK. It alternates between 0 and 5 volts. The delay time, rise time and fall time are all zero. The pulse width is 20 and the period is 40, so the voltage will be high for 20ns, then low for 20ns, then high for 20ns, etc.
If your clock is on the order of ns like in my example, then you want to change the .TRAN line at the top of this file. The syntax is .TRAN TSTEP TSTOP TSTART. You want TSTEP less than your clock pulse width. You also don't want TSTOP too big, or hspice will take forever to run. Here's an example: .TRAN 1ns 1us 0.
If your inverter connects to VSS instead of ground, you have to make additional changes to this file. In the .GLOBAL line at the top of the file, add vss to the list after vdd and gnd. Then under the Power Supply Definitions (you'll see vdd vdd gnd 5.0v) add another line for vss (vss vss gnd 0.0v). What you're doing is making a voltage source between vss and gnd that supplies 0 volts (i.e. connecting vss and gnd).
Telnet to jefferson.
At the UNIX prompt, type source /opt/digital/setup_hspice
At the prompt, type the name of your spice file (spice_out).
Use defaults for the other questions (just hit enter).
The hspice job should take a few minutes to run and generate a .tr0 file. If it doesn't, edit your spice_out.lis file and look for errors and warnings.
To see the output graphically, type awaves spice_out.tr0

 

QSIM

In order to make it possible to run qsim, you have to base your instantiated gates (inverter and transmission gate) off models already in the mentor library. 
Make your inputs and outputs have the same labels as the library csfer and inv gates. INV input should be I0 and output should be OUT. CXFER (transmission gate) input should be I0, PMOS gate connection should be P0, NMOS gate connection should be E0, and output should be OUT.
Give your gate a model property:
Click on the gate to select it.
Right click on it to bring up the pop-up menu. Select properties, then add, then add single property. The property name should be MODEL and the property value should be INV or CXFER, depending on the gate.
Save everything, run checks. Be sure to update your transmission gates and inverters in your flip-flop circuit (right-click, then update). 
If you have trouble, close the flip flop schematic. Open the transmission gate schematic. Run the check. Save. Close. Open the inverter schematic. Run the check. Save. Close. Now try to update.
Create a qsim directory:
mkdir ~/qsim
Enter qsim
cd ~/qsim
Create a qsim viewpoint.
qview ~/mentor/nets/hw2
Copy ~jmorizio/qsim/*.setup and *.force to your qsim directory.
cp ~jmorizio/qsim/*.setup .
cp ~jmorizio/qsim/*.force .
Edit the files to include your ports and simulation stimulus:
Here's an example qsim.setup:
$set_active_window("session");
$$open_sheet(["/ : sheet1"]);
$set_active_window("Schematic_view");
$minimize_window();
$add_traces(@nooverlay, void, void, "D", "clock", "Q", "Q_BAR");
Here's an example qsim.force:
INITIALIZE 
RUN 1
FORCE D 0
RUN 10
FORCE CLOCK 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
FORCE D 1
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
FORCE D 0
RUN 50
FORCE CLOCK 1
RUN 50
FORCE CLOCK 0
RUN 50
STOP
Run quicksim:
quicksim ~/mentor/nets/hw2/viewqsim2
Click on "Open Sheet" on the palette on the right side of the window. Your schematic should appear. Make it big.
Click on the nodes you want to trace in the order in which you want to trace them, highlighting them.
Click on the "Trace" button on the palette on the right side of the window. A trace window should appear and it should contain the nodes you selected.
Click on the Setup menu.
Click on the Force item.
Choose "From File".
Navigate to ~/qsim/qsim.force.
You should see your waveforms!

 

FAQ

How do I connect poly to metal 1?

   Overlay Metal 1 and Poly. Then put down a CONTACT_TO_POLY. CONTACT_TO_POLY should be 2 X 2 lambda. Metal 1 must overlap contact by 1 lamba on all sides. Poly must overlap contact by 2 lambda on all sides. This can be accomplished with a large poly square. See picture.

¨ Rebecca Willett, 06-Oct-99