WELCOME
TO ANALOG AND MIXED SIGNAL IC DESIGN
The
following tools will be used:
MENTOR
HSPICE
Rules for DRC
and LVS checking and netlist extraction from IC
Obtaining
Netlist from DA and IC
0.5um Models
for HSpice simulation
Tips on IC
Tips
on Hspice
Response
to queries of HW1
HW2 in pdf format
Response to Queries of HW2