Bogdan F. Romanescu

I'm a fifth year Ph.D. student in Electrical and Computer Engineering at Duke University. I enjoy a good spell of computer architecture research alongside my advisor dr. Dan Sorin and dr. Alvy Lebeck. I also hold a Master of Science degree in ECE from Duke University.

I earned my Bachelor of Engineering in Automatic Control and Computer Engineering from the Technical University of Iasi, Romania in 2005. Until deciding to commit to Duke, I was also a full-time student in Mathematics at Al.I.Cuza University of Iasi, Romania.

Since 2008 I'm the CAD administrator for the ECE department - CAD wiki. I also serve as the current treasurer for the Engineering Graduate Student Council (EGSC).

CV/Resume

UNITD - Scalable address translation coherence protocols
Proposed a hardware coherence protocol for maintaining address translation coherence that is more scalable and outperforms the current softwarebased solutions relying on TLB shootdowns. Demonstrated the new design’s efficiency on a modified Linux kernel.

CCA - Fault-tolerant many-core chips
Tolerating permanent faults in many-core chips by aggregating fault-free components from neighboring faulty cores to increase the number of functional cores. Implemented solution in HDL and evaluated it using a functional simulator.

Variasim - Process variability-aware design
Developed the VariaSim tool for analyzing the effect of process variability on hardware devices (design flow includes synthesis, floorplanning and SPICE simulation). Proposed hardware techniques for mitigating the process variation impact at the microarchitectural level.

• "UNified Instruction/Translation/Data (UNITD) Coherence: One Protocol to Rule Them All", Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. Sorin, and Anne Bracy, To appear in 16th IEEE International Symposium on High-Performance Computer Architecture (HPCA), January 2010.

• "Core Cannibalization Architecture: Improving Lifetime Chip Performance for Multicore Processors in the Presence of Hard Faults", Bogdan F. Romanescu and Daniel J. Sorin, 17th International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2008.

• "Reducing the Impact of Intra-Core Process Variability with Criticality-Based Resource Allocation and Prefetching", Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, and Sule Ozev, ACM International Conference on Computing Frontiers, May 2008.

• "VariaSim: Simulating Circuits and Systems in the Presence of Process Variability", Bogdan F. Romanescu, Michael E. Bauer, Sule Ozev, and Daniel J. Sorin, Computer Architecture News, volume 35, number 5, December 2007.

• "Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation", Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, and Sule Ozev, Poster and extended abstract in 16th International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2007.

• "A Case for Computer Architecture Performance Metrics that Reflect Process Variability", Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, and Sule Ozev, Duke University, Dept of Electrical and Computer Engineering, Technical Report #2007-2, May 2007.

• "Quantifying the Impact of Process Variability on Microprocessor Behavior", Bogdan F. Romanescu, Sule Ozev, and Daniel J. Sorin, 2nd Workshop on Architectural Reliability (WAR), December 2006.

• "Algorithms and languages for parallel computing, Laboratory manual", Mitica Craus, Cristian M.Amarandei, Bogdan F. Romanescu, Iasi, Romania, May 2005 [original Romanian title: "Algoritmi si limbaje pentru calcul paralel, Indrumar de laborator"]

• "A Program for Computer Aided Administration in Jigs Fixtures Design", Bogdan. F. Romanescu, Camelia M. Romanescu, International Conference on Engineering Graphics and Design, Bucharest, Romania, 2005

• "Reliability Evaluation Program for Large Communication Networks", Bogdan F. Romanescu, Petru Cascaval, 8th International Symposium on Automatic Control and Computer Science(SACCS), Iasi, Romania, May 2004

• "Analysis Influence of Hydraulics Parameters on a Vibratory Element", Petru Dusa, I. Sarbu, Bogdan F.Romanescu, LMK14 – Research and Development Journal, Krusevac, Serbia, nr 23, 2001

Internships

• Intel Corp., Microarchitecture Research Lab, Santa Clara, CA, Jan.-April 2009. Mentor: dr. Anne Bracy

• MIPS Tech, Mountain View, CA, May-Aug. 2007. Mentor: dr. Jaidev Patwardhan

Research assistant

• Duke University, Durham, NC. Electrical and Computer Eng. Dept., Aug. 2005 - date

• Darmstadt Technical University, Darmstadt, Germany. Microelectronic Systems Dept., March-June 2004.

Teaching assistant

• Digital Systems Design, Spring 2007

Advanced computer architecture I
Advanced computer architecture II

Fault tolerant computing

Nanocomputing

Foundations of nanoscience

VLSI design

VLSI testing

Semiconductor devices

Operating systems (aud)

Algorithms design (aud)

Machine learning

Mathematical methods for system analysis

Experimental methods in computer science

Embedded real-time systems